Digital System Design

PART –A 

1. ^a) Given that (292)₁₀ = (1204)_b, determine b. (2M) b) _{List out the postulates used in Boolean algebra.} (2M)
   1. What are the don’t care conditions of a Boolean function? (3M)
   2. Draw the circuit of a full adder using two half adders and OR gate. (2M)
   3. _{Convert a T flip-flop to D-type flip-flop.} (3M)
   4. _{Write a note on synchronous counter.} (2M)

PART –B

2. a) Convert the following numbers. i) (10101100111.0101)₂ to Base 10. ii) (7M)

(153.513)₁₀ to base 8. 

1. b) Discuss the subtraction of two numbers using radix complement and (7M) diminished radix complement forms.

3. a) Reduce the following Boolean expressions. i)AB+A(B+C)+B(B+C)          (7M) ii)ABEF+ AB(EF)′+(AB)′  iii) A′B′+A′BC′+A′BCD+A′BC′D′E.
4. b) Write the Postulates and theorems of Boolean Algebra.              (7M)

1. Simplify the following using K-map method in SOP and POS forms. (14M)

F(A,B,C,D,E)=∑(0,2,4,6,9,11,13,15,17,21,25,27,29,31).

2. a) _{Design a 4-bit carry look ahead adder circuit.} (7M) b) Design a combinational circuit for a 2-bit magnitude comparator. (7M)

3. a) Draw a neat circuit diagram of positive edge triggered D flip-flop and explain (7M) its operation.
4. b) Distinguish between combinational logic and sequential logic.  (7M)

4. a) Explain the working of a 4-bit register which uses parallel load with a logic (7M) diagram;
5. ^b) Design a 4-bit ripple counter using T-flip-flop. Explain using wave forms                                                    (7M)

1 of 1

1. ^a) What is the gray code equivalent of the Hexa number 3A7? (2M) b) _{State and prove Demorgan`s theorems.}  (2M)
2. 1. a) Convert the following to required form i) (163.789)₁₀ = ( )₈      (7M)
      101101110001. (101101110001.00101)₂ =( )
   • (292)₁₆ = ( )
   1. Perform the given subtraction using 1’s and 2’s complement methods: (7M)

   (10110)₂ - (1101101)₂.

    

   2. a) Find the complement of the following and show that F.F′ =0 and F+ F′=1. i) (7M)

   F=(x+y^′+z)(x^′+z^′)(x+y)

   1. Express the following function in sum of Minterms and product of Maxterms. (7M)

1. a) Obtain the simplified expression in sum of products and product of sums form (14M) using K-map method. F(A,B,C,D,E)=∑(0,1,4,5,9,16,17,21,25,29)

2. a) What is a decoder? Explain a 4:16 decoder with a truth table and logic (7M) diagram.
   1. Write a HDL program to find the 2’s complement of an 8-bit binary number. (7M)

3. a) Draw a neat circuit diagram of a negative edge triggered JK flip-flop and (7M) explain its operation.
   1. Explain the operation of RS master-slave flip-flop. Explain its truth table. (7M)

4. a) _{Draw and explain 4-bit universal shift register.} (7M)    b) Draw the circuit diagram of 4-bit Johnson counter using D flip-flop and explain      (7M) its operation with help of bit pattern.

1. ^a) Find (72532-03250) using 9`s complement. (2M) b) Obtain the minimal sum of product expression of a given function by using (3M) consensus theorem.
   1. _{Write the properties of XOR gate.} (3M)
   2. Write the steps involved in the design of a combinational circuit. (2M)
   3. _{Write the excitation table of a JK flipflop.} (2M)
   4. _{What is a ripple counter?} (2M)

PART –B

2. ^a) Convert the following i) AB₁₆ = ( )₁₀ ii) 1234₈ = ( )₁₀  iii) 772₁₀ = ( )₁₆ . (7M)  b) Perform the following subtraction in binary using 1’s and 2’s complement (7M) methods:   (199)₁₀ - (254)₁₀.

3. a) What is the canonical and standard forms of a Boolean function? Explain with (7M) an example.
   1. Reduce the following Boolean expressions. i) ((AB)′+A′+AB)′  ii) (7M) AB+(AC)′+AB′+C(AB+C). iii)((AB′+ABC)′+A(B+AB′))′

4. a) Obtain minimal           POS     expression       for       the       Boolean                    (7M)

F(A,B,C,D)=Π(0,1,2,3,4,6,9,10)+d(7,11,13,15).draw the circuit using 2 input NAND gates.

1. Prove that NAND and NOR operations are commutative but not associative. (7M)

5. a) Explain 16x1 multiplexer with the help of truth table and logic diagram. (7M) b) Design a priority encoder of 4-bit. (7M)

6. a) What is race around condition? Explain how is it eliminated in master-slave (7M) flip-flops with diagram?
   1. Convert the JK flip-flop to T flip-flop. (7M)

1. a) _{Design a serial adder using shift register.} (7M) b) Explain about the two ways to achieve a BCD counter using a counter with (7M) parallel load.

1. ^a) Add and subtract in binary 1111 and 1010. ^{(2M)  b)} Simplify the following function (x+y)(x′(y′+z′))+x′y′+x′z′. ^(3M)
   1. How the minterms, maxterms and Don’t care conditions are represented in K- (3M) map method.
   2. What is a priority encoder? ^(2M)
   3. Draw the circuit diagram of clocked flip-flop with NAND gates.       ^(2M)
   4. Write the merits and demerits of synchronous counter. ^(2M)

PART –B

2. a) Convert the following numbers i) (53)₁₀ =( )₂  ii) (231)₄ =( )₁₀  iii) (1101101)₂ =         (7M) ( )₈  iv) (4D.56)₁₆ = ( )₂
   2. Perform the following arithmetic operation using 1’s and 2’s complement (7M) methods: (1101110)₂ – (10101)₂.
3. ^a) Discuss the properties of Boolean algebra. ^(6M) b) Obtain the complement and dual of the following Boolean expressions.  (8M)
4. i) A′B+A′BC′+A′BCD+A′BC′D′ ii) ABEF+ABE′F′+A′B′EF

4. a) If F₁(A,B,C,D)=∑(1,3,4,5,9,10,11)+d(6,8) and            (7M)

F₂(A,B,C,D)=∑(0,2,4,7,8,15)+d(9,12) . Obtain minimal SOP expression for  F₁⊕ F₂ using k-map and draw the circuit using NAND gates. 

1. Draw NOR logic diagram that implements the following function. (7M)

F(A,B,C,D)=Π(0,1,2,3,4,8,9,12)

1. ^a) Draw the circuit diagram of a full subtractor using NOR gates. ^(7M)  b) What is decoder? Construct a 4:16 decoder with two 3:8 decoders. (7M)

2. a) Design a finite state machine which can detect the sequence 0010 by using JK (7M) flip-flop.
   1. Discuss in detail about sequential circuits with examples. (7M)

3. ^a) Explain universal shift registers with truth tables. ^{(7M) b)} Design a Mod-10 counter with T flip-flops. ^(7M)

1. ^a) (22B)_x =(555)₁₀ then Find the value of ‘x’   ^{(2M)  b)} Simplify the following Boolean functions (i)  X (X^l +Y)       (ii) XY+YZ +X^lZ ^(3M)
2. c) Write the Max terms corresponding to the logical expression      (2M)

Y = (A+B+C^l). (A+B^l+C^l).(A^l+B^l+C)

1. Implement XOR gate by using NAND gates.       (2M)
2. Write the excitation table for T Flip-flop. ^(3M)
3. Define synchronous counter.        ^(2M)

PART -B

2. a) How do you convert a gray number to binary? Generate a 4-bit gray code (8M) directly using the mirror image property?
   1. Write the comparison between 1’s complement and 2’s complement.         (6M)

3. a) Simplify the following (7M)

(i)AB+ BC+ A^lC  = AB+ A^lC          (ii) (X+Y).(Y^l+Z) = X

1. Convert the following expression into SOP and POS (7M)

(i) (AB+C)(B+ ^̅ )                    (ii) ̅+(x+ )(y+ ̅)

4. a) Simplify the following function using K-Map              f(a,b,c,d)= ∑m(3,7,11,12,13,14,15)
   1. Design an odd parity circuit using XOR gate.  

1. ^a) Draw and explain the 8×1 MUX. ^(7M)    b) Convert the BCD to XS-3 and XS-3 to BCD by using a full adder.  (7M)

2. a) What is Race condition and explain about the operation of clocked RS flip- (7M) flop.
   1. Convert the JK Flip-flop into RS flip-flop. (7M)

3. ^a) Design a 4-bit ring counter with as in table figure.       ^{(7M)    b)} Design a 4 bit shift left register  using flip flops.   ^(7M)